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Features
•
Low-voltage and Standard-voltage Operation
– 5.0 (V
CC
= 4.5V to 5.5V)
– 2.7 (V
CC
= 2.7V to 5.5V)
– 2.5 (V
CC
= 2.5V to 5.5V)
– 1.8 (V
CC
= 1.8V to 5.5V)
•
User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
– 2K: 256 x 8 or 128 x 16
– 4K: 512 x 8 or 256 x 16
•
3-wire Serial Interface
•
2 MHz Clock Rate (5V) Compatibility
•
Self-timed Write Cycle (10 ms max)
•
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
– ESD Protection: >4000V
•
Automotive Grade and Extended Temperature Devices Available
•
8-pin PDIP, 8-lead JEDEC and EIAJ SOIC, and 8-lead TSSOP Packages
3-wire Serial
EEPROMs
1K (128 x 8 or 64 x 16)
2K (256 x 8 or 128 x 16)
4K (512 x 8 or 256 x 16)
Description
The AT93C46/56/57/66 provides 1024/2048/4096 bits of serial electrically erasable
programmable read only memory (EEPROM) organized as 64/128/256 words of 16
bits each, when the ORG pin is connected to V
CC
and 128/256/512 words of 8 bits
each when it is tied to ground. The device is optimized for use in many industrial and
commercial applications where low power and low voltage operations are essential.
The AT93C46/56/57/66 is available in space saving 8-pin PDIP and 8-lead JEDEC
and EIAJ SOIC packages.
(continued)
AT93C46
AT93C56
AT93C57
AT93C66
Pin Configurations
Pin Name Function
8-pin PDIP
CS
Chip Select
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
SK
Serial Data Clock
DI
Serial Data Input
DO
Serial Data Output
GND
Ground
VCC
Power Supply
8-lead SOIC
ORG
Internal Organization
DC
Don’t Connect
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
8-lead SOIC
Rotated (R)
(1K JEDEC Only)
8-lead TSSOP
DC
VCC
CS
SK
1
2
3
4
8
7
6
5
ORG
GND
DO
DI
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
Rev. 0172L–10/99
1
The AT93C46/56/57/66 is enabled through the Chip Select
pin (CS), and accessed via a 3-wire serial interface consist-
ing of Data Input (DI), Data Output (DO), and Shift Clock
(SK). Upon receiving a READ instruction at DI, the address
is decoded and the data is clocked out serially on the data
output pin DO. The WRITE cycle is completely self-timed
and no separate ERASE cycle is required before WRITE.
The WRITE cycle is only enabled when the part is in the
ERASE/WRITE ENABLE state. When CS is brought “high”
following the initiation of a WRITE cycle, the DO pin out-
puts the READY/BUSY status of the part.
The AT93C46 is available in 4.5V to 5.5V, 2.7V to 5.5V,
2.5V to 5.5V, and 1.8V to 5.5V versions. The
AT93C56/57/66 is available in 4.5V to 5.5V, 2.7V to 5.5V,
and 2.5V to 5.5V versions.
Absolute Maximum Ratings*
Operating Temperature.................................. -55
°
C to +125
°
C
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
Storage Temperature ..................................... -65
°
C to +150
°
C
Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
Block Diagram
Note: 1. When the ORG pin is connected to V
CC
, the x 16 organization is selected. When it is connected to ground, the x 8 organiza-
tion is selected. If the ORG pin is left unconnected, then an internal pullup device (of approximately 1 M
Ω
) will select the x
16 organization. This feature is not available on 1.8V devices.
2
AT93C46/56/57/66
AT93C46/56/57/66
Pin Capacitanc
Applicable over recommended operating range from T
A
= 25
°
C, f = 1.0 MHz, V
CC
= +5.0V (unless otherwise noted).
Symbol
Test Conditions
Max
Units
Conditions
C
OUT
Output Capacitance (DO)
5
pF
V
OUT
= 0V
C
IN
Input Capacitance (CS, SK, DI)
5
pF
V
IN
= 0V
Note: 1. This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: T
AI
= -40
°
C to +85
°
C, V
CC
= +1.8V to +5.5V,
T
AC
= 0
°
C to +70
°
C, V
CC
= +1.8V to +5.5V (unless otherwise noted).
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
V
CC1
Supply Voltage
1.8
5.5
V
V
CC2
Supply Voltage
2.5
5.5
V
V
CC3
Supply Voltage
2.7
5.5
V
V
CC4
Supply Voltage
4.5
5.5
V
READ at 1.0 MHz
0.5
2.0
mA
I
CC
Supply Current
V
CC
= 5.0V
WRITE at 1.0 MHz
0.5
2.0
mA
I
SB1
Standby Current
V
CC
= 1.8V
CS = 0V
0
0.1
µA
I
SB2
Standby Current
V
CC
= 2.5V
CS = 0V
6.0
10.0
µA
I
SB3
Standby Current
V
CC
= 2.7V
CS = 0V
6.0
10.0
µA
I
SB4
Standby Current
V
CC
= 5.0V
CS = 0V
17
30
µA
I
IL
Input Leakage
V
IN
= 0V to V
CC
0.1
1.0
µA
I
OL
Output Leakage
V
IN
= 0V to V
CC
0.1
1.0
µA
V
IL1
V
IH1
Input Low Voltage
Input High Voltage
4.5V
≤
V
CC
≤
5.5V
-0.6
2.0
0.8
V
CC
+ 1
V
V
IL2
V
IH2
Input Low Voltage
Input High Voltage
1.8V
≤
V
CC
≤
2.7V
-0.6
V
CC
x 0.7
V
CC
x 0.3
V
CC
+ 1
V
V
OL1
V
OH1
Output Low Voltage
Output High Voltage
4.5V
≤
V
CC
≤
5.5V
I
OL
= 2.1 mA
0.4
V
I
OH
= -0.4 mA
2.4
V
V
OL2
V
OH2
Output Low Voltage
Output High Voltage
1.8V
≤
V
CC
≤
2.7V
I
OL
= 0.15 mA
0.2
V
I
OH
= -100 µA
V
CC
- 0.2
V
Note: 1. V
IL
min and V
IH
max are reference only and are not tested.
3
AC Characteristics
Applicable over recommended operating range from T
A
= -40°C to + 85°C, V
CC
= As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol
Parameter
Test Condition
Min
Typ
Max
Units
f
SK
SK Clock
Frequency
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
0
0
0
0
2
1
0.5
0.25
MHz
t
SKH
SK High Time
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
250
250
500
1000
ns
t
SKL
SK Low Time
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
250
250
500
1000
ns
t
CS
Minimum CS
Low Time
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
250
250
500
1000
ns
t
CSS
CS Setup Time
Relative to SK
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
50
50
100
200
ns
t
DIS
DI Setup Time
Relative to SK
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
100
100
200
400
ns
t
CSH
CS Hold Time
Relative to SK
0
ns
t
DIH
DI Hold Time
Relative to SK
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
100
100
200
400
ns
t
PD1
Output Delay to ‘1’
AC Test
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
250
250
500
1000
ns
t
PD0
Output Delay to ‘0’
AC Test
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
250
250
500
1000
ns
t
SV
CS to Status Valid
AC Test
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
250
250
500
1000
ns
t
DF
CS to DO in High
Impedance
AC Test
CS = V
IL
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
100
100
200
400
ns
0.1
10
ms
t
WP
Write Cycle Time
4.5V
≤
V
CC
≤
5.5V
1
ms
Endurance
5.0V, 25°C, Page Mode
1M
Write Cycles
Note: 1. This parameter is characterized and is not 100% tested.
4
AT93C46/56/57/66
AT93C46/56/57/66
Instruction Set for the AT93C46
Op
Code
Address
Data
Instruction
SB
x 8
x 16
x 8
x 16
Comments
READ
1
10
A
6
- A
0
A
5
- A
0
Reads data stored in memory, at
specified address.
EWEN
1
00
11XXXXX
11XXXX
Write enable must precede all
programming modes.
ERASE
1
11
A
6
- A
0
A
5
- A
0
Erase memory location A
n
- A
0
.
WRITE
1
01
A
6
- A
0
A
5
- A
0
D
7
- D
0
D
15
- D
0
Writes memory location A
n
-
A
0
.
ERAL
1
00
10XXXXX
10XXXX
Erases all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
WRAL
1
00
01XXXXX
01XXXX
D
7
- D
0
D
15
- D
0
Writes all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
EWDS
1
00
00XXXXX
00XXXX
Disables all programming instructions.
Instruction Set for the AT93C57
Op
Code
Address
Data
Instruction
SB
x 8
x 16
x 8
x 16
Comments
READ
1
10
A
7
- A
0
A
6
- A
0
Reads data stored in memory, at
specified address.
EWEN
1
00
11XXXXXX
11XXXXX
Write enable must precede all
programming modes.
ERASE
1
11
A
7
- A
0
A
6
- A
0
Erase memory location A
n
-
A
0
.
WRITE
1
01
A
7
- A
0
A
6
- A
0
D
7
- D
0
D
15
- D
0
Writes memory location A
n
- A
0
.
ERAL
1
00
10XXXXXX
10XXXXX
Erases all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
WRAL
1
00
01XXXXXX
01XXXXX
D
7
- D
0
D
15
- D
0
Writes all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
EWDS
1
00
00XXXXXX
00XXXXX
Disables all programming instructions.
5
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